Semtech Releases New Digital Baseband IC in the LoRa Core Portfolio That Provides Worldwide LoRaWAN Network Coverage and Capabilities

LoRa Core products provide the “core values” of LoRa-enabled end-to-end communication in the sub-GHz band

Semtech Corporation, a leading supplier of high performance analog and mixed-signal semiconductors and advanced algorithms, has announced the LoRa Core portfolio with a new chipset. The LoRa Core portfolio provides global LoRaWAN network coverage and is targeted to several vertical industries including asset tracking, building, home, agriculture, metering, and factory automation.

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The LoRa Core portfolio consists of sub-GHz transceiver chips, gateway chips and reference designs including SX126x series, SX127x series and LLCC68 transceiver chips, as well as the SX130x series gateway chips, legacy gateway reference designs and the LoRa Corecell gateway reference designs. Together, they represent the essential capability of Semtech’s LoRa devices including long range, low power and cost effective end-to-end communication.

New additions to the LoRa Core portfolio are a gateway baseband processor integrated with LoRa (SX1303) and an associated LoRa Corecell gateway reference design that supports the fine timestamp feature.

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“The new LoRa Core gateway IC enables the network-centric geolocation of LoRa devices without requiring the inclusion of GPS hardware at each individual end node. Based on a fine timestamp capability that provides accurate time of arrival information for each demodulated message, the new chipset allows gateways to perform network-centric geolocation based on Time Difference of Arrival (TDOA). This is ideal for several cost-sensitive asset tracking applications,” said Pedro Pachuca, Director of Wireless Products in Semtech’s Wireless and Sensing Products Group. “The new LoRa Core IC helps customers accelerate the development of their applications operating the LoRaWAN protocol. Semtech is committed to delivering solutions to customers that simplify their application development cycle when using LoRa devices.”

The new LoRa Corecell gateway reference design, with fine timestamp, is available for U.S., Europe and China regions, and will enable developers to produce gateways integrating LoRa with optimal bill-of-material (BOM) and the lowest power profile, while offering the latest performance for network-centric geolocation.

Key Features of the new LoRa Core chipset (SX1303):

• Provides accurate time of arrival information for each demodulated LoRa frame
• Fine timestamp is a nano second resolution value references to a PPS (pulse per second) signal
• Geolocation accuracy is around 75–150 meters depending on many different factors
• Size and pin-to-pin compatible with LoRa Core SX1302
• Featured for implementations leveraging the LoRaWAN protocol and worldwide sub-GHz bands
• Up to -141dBm sensitivity with LoRa Core SX1250 Tx/Rx front-end
• Unique 64-bit serialized number for identification and security purposes
• Gateway offers lower power consumption and smaller size than legacy gateways

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