Si5332 Clock Family Supports Industry Transition to PCIe 6.0
Skyworks Solutions,announced the evolution of its Si5332 family of high-performance clock generators, supporting the industry transition to PCI Express Generation 6 (PCIe 6.0). According to PCI-SIG, new applications including artificial intelligence, machine learning and edge computing are driving the need for higher performance and increased bandwidth interconnects for compute, switching and storage platforms in data centers1. The Si5332 product family from Skyworks supports PCIe 6.0 while maintaining backwards compatibility with older PCIe standards.
Natural Language Processing Capabilities : Finch Computing Accelerates its Natural Language Processing Capabilities
“PCIe 6.0 is the future of the data center, and Skyworks is helping IC suppliers design with confidence when they make the transition to the latest PCIe standard”
“PCIe 6.0 is the future of the data center, and Skyworks is helping IC suppliers design with confidence when they make the transition to the latest PCIe standard,” said James Wilson, vice president and general manager of timing products at Skyworks. “Drawing from our decades of expertise in providing high-performance, low-jitter timing solutions for high-speed serial interconnect applications, we have qualified our Si5332 family to provide reference timing for the newest PCIe 6.0 applications.”
PCIe 6.0 increases data rates to 64GT/s and enables bandwidths as high as 256Gbps, effectively doubling the performance of PCIe 5.0. This latest upgrade to the PCIe standard ensures the high-speed interconnects used in data center applications do not become a bottleneck and complements the industry’s transition to 400G and 800G Ethernet. Unlike prior generations of the PCIe standard that used NRZ signalling, PCIe 6.0 uses PAM4 modulation to combine two bits into a single symbol with four amplitude levels. This approach doubles the transfer speed but degrades the eye diagram by replacing a single, large data eye with three smaller data eyes. Using a low jitter PCIe reference clock maximizes the PAM4 data eye opening and minimizes bit-error rate, which is necessary for faster transfer speeds.
Data Science News: Mosaic Data Science Develops Innovative AI-Text Generation Tool That Summarizes Content for Specific Audiences
The Si5332’s any-frequency clock synthesis, low jitter operation and support for PCIe 6.0 makes it ideally suited to replace fixed function oscillators, clocks and buffers with a single IC. The device features Skyworks proprietary MultiSynthTM fractional divider technology, which provides any-frequency synthesis and excellent jitter performance. The Si5332 is available in 6, 8 and 12-output options, with support for integrated format/level translation, LVPECL, LVDS, HCSL and LVCMOS, and 1.8-3.3V VDDO operation. When combined with support for PCIe 6.0, the Si5332 is well suited to operate as a data center clock-tree-on-a-chip, replacing multiple timing components with a highly integrated, high-performance solution. Device samples are available now.
In addition to this Si5332 product announcement, Skyworks is pleased to announce PCIe 6.0 support in its PCIe Jitter Tool. Long regarded as the industry standard for measuring PCIe clocks and evaluating compliance to PCIe jitter specs, the PCIe Jitter Tool now allows users to take accurate jitter measurements on PCIe 6.0 reference clocks.
AI Insights : XAPP AI Achieves AWS Conversational AI Competency Distinction
[To share your insights with us, please write to sghosh@martechseries.com]
Comments are closed.