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GBT Filed Patent Continuation Application for its Automatic Correction of Integrated Circuits Connectivity Mismatches Patent

GBT Files Continuation In-Part Application, Adding New Subject Matter of 3D, Multiplanar Architecture for Photonic Microchips

GBT Technologies, filed a continuation patent application seeking to protect the automatic correction of Integrated Circuits (“ICs”) electrical connectivity mismatches, which GBT has assigned an internal code name Sigma. The application has been assigned serial number 17880055 and the filing date was February 16, 2023. The continuation application seeks to strengthen the patent protection of the technology, focusing on intelligent systems and methods to automate integrated circuits electrical connectivity violations correction. Sigma’s goal is to accelerate integrated circuits design time, and produce higher quality designs, particularly for advanced nanometer range of 5nm and below.

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An IC’s electrical connectivity mismatch means incorrect wiring between the IC’s components that may cause a malfunction or wrong functionalities. As smaller nodes microchips include a vast number of devices, in the billions range, the chances of making connectivity errors dramatically increases, particularly in Analog, MIXED and RF designs where major manual IC layout work is done. LVS (Layout vs Schematic) errors correction typically take major amount of fixing time, and may have further impact like area growth, and introduce additional violations.

GBT’s patent application describes an on-the-fly algorithmic system and methods to perform an automatic connectivity mismatch correction. The algorithm reads the IC’s schematic and layout data, comparing their electrical connections and in case of mismatches, disconnecting the incorrect wires, re-route them in the proper way. It is the goal of the technology to eliminate the manual, tedious, and time-consuming correction task, improving the microchip’s overall silicon area, its performance and electrical characteristics.

The continuation application is particularly focused on the Artificial Intelligence methods to enable high accuracy, optimization, and utilization of silicon area utilization, and handling complex calculations in a reasonable time. As modern chips consist of huge data, analyzing and processing tasks become a significant challenge. GBT is seeking to address these topics efficiently and rapidly. Upon implementation of this technology, we believe IC design companies will be able to design microchips faster and bringing them faster to market which will create new opportunities and horizons in this domain. GBT intends to file a series of patent applications in this field to further enhance the next era of integrated circuit design and manufacturing methods.

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In addition, the Company filed a continuation-in-part (CIP) patent application adding new subject matters to its 3D, MP integrated circuit patent. The added intellectual property (IP) materials are related to photonic integrated circuits (PIC) design and manufacturing architecture. The application has been assigned serial number 18109291 and the filing date was February 14, 2023.

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A traditional microchip is an integrated circuit that contains electronic components that form a functional circuit, for example microprocessors, controllers, GPUs, Memories, and more. The electrical information and power inside the chip is transferred through electron flux through the components and wires. A photonic integrated circuit (PIC) is a chip that contains photonic components, which are components that work with light (photons). In a PIC, photons pass through optical components such as waveguides (equivalent to electrical wires), lasers (equivalent to transistors) and similar. GBT’s 3D, MP patent technology enables larger PICs, with higher performance and less energy/heat loss. These chips will increase the traffic speed and bandwidth of data centers, reduce power consumption/heat, lowering cost, and ultimately helping create a “greener world”.

GBT’s CIP seeks to protect IP covering the next generation of high performance, bandwidth, and efficiency of PICs, making them a vital part of the high-speed technology of the future. The patent application also seeks to protect 3D, MP hybrid technology, combining photonics and conventional circuits. A hybrid solution offers advantages of photonic circuits working together with conventional ones in a 3D multiplanar structure. GBT plans to continue its R&D efforts in the photonic ICs arena as it is an evolving, pioneering technology in the semiconductor domain.

There is no guarantee that the Company will be successful in researching, developing or implementing this system. In order to successfully implement this concept, the Company will need to raise adequate capital to support its research and, if successfully researched, developed and granted regulatory approval, the Company would need to enter into a strategic relationship with a third party that has experience in manufacturing, selling and distributing this product. There is no guarantee that the Company will be successful in any or all of these critical steps.

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