TeraSignal Introduces TSLink: Protocol-Agnostic Intelligent Interconnect for Plug-and-Play Linear Optics in AI Infrastructure

Innovative TSLink Architecture Based on TS8401/02 Enables Mass Adoption of Intelligent 800G LPO Modules with Automatic Link Training and Link Monitoring

TeraSignal, a leader in intelligent interconnect technology, today introduced TSLink, the world’s first intelligent chip-to-module (C2M) interconnect designed to revolutionize data transmission between large ASICs and linear optical modules. Leveraging existing microcontroller resources in optical modules, the TSLink solution automates link training and performance monitoring without the need for additional digital signal processors (DSPs). TSLink dramatically reduces power consumption and latency while simplifying deployment, enabling a true plug-and-play linear optics solution for AI and high-performance computing.

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TSLink leverages the DSP-based SerDes functionality already present in AI ASICs and GPUs, providing a streamlined connection that optimizes performance across various protocols and modulation schemes. This architectural innovation, enabled by TeraSignal’s TS8401/02 Intelligent Re-Drivers, positions the company at the forefront of interconnect technology by offering a highly adaptable and energy-efficient solution for next-generation AI infrastructure.

“TSLink is architected to unlock the full potential of modern high-speed interconnects by embedding intelligence directly into the C2M connection, minimizing power consumption and latency while ensuring optimal link performance,” said Dr. Armond Hairapetian, Founder and CEO of TeraSignal. “With its advanced link training and performance monitoring capabilities, TSLink transforms how data moves across today’s most demanding AI applications.”

TSLink can interface seamlessly with existing ASICs and simplifies the process of connecting ASICs to various types of linear optics such as linear pluggable optics (LPO), near package optics (NPO), co-packaged optics (CPO) and active copper cables (ACC). This plug-and-play capability streamlines and simplifies deployment, reducing the complexity typically associated with traditional high-speed interconnects. Designed to be agnostic to leading protocols (Ethernet, PCIe, InfiniBand, etc.), modulation schemes (NRZ, PAM4, etc.) and media (fiber, copper), TSLink offers exceptional flexibility across different applications, making it a highly adaptable solution for various data transmission needs.

Traditional interconnects rely on DSPs to manage data transmission, leading to increased power consumption and latency. TSLink eliminates these bottlenecks by embedding advanced discrete-time signal processing algorithms directly into the interconnect, intelligently managing data transmission and ensuring optimal link integrity without the need for redundant digital signal processing.

Key TSLink Benefits

• Automatic Link Training: By leveraging the Common Management Interface Specification (CMIS), TSLink automatically characterizes the host to module channel and provides the optimum settings for the DSP-based transmitter in the host.
• Link Diagnostics and Monitoring: TSLink includes features like digital eye monitoring and bit error rate (BER) reporting, allowing users to easily monitor channel conditions and ensure optimal performance in the link.
• Reduced Power Consumption: By using existing microcontroller resources and eliminating the need for additional DSPs, TSLink reduces power consumption by at least 50%, making it a more sustainable solution for high-density AI deployments.
• Lower Bit Error Rate: TSLink eliminates the quantization noise introduced by analog-to-digital converters (ADCs) in DSP-based re-timers, significantly improving the BER in the link.
• Reduced Latency: TSLink removes the high latency caused by DSP processing, enabling shorter transmission time, which is critical for high-performance, compute-intensive AI applications.
• Improved Signal Integrity: The advanced link training process shapes the transmit signal based on the characteristics of each individual channel, ensuring maximum signal to noise ratio at the receiver.
• Small Form Factor: Eliminating the need for DSPs results in at least a 50% reduction in silicon die size, contributing to lower production costs and higher density linear optics.

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Automatic Link Training and Monitoring
TSLink uses advanced impulse response link training (IRLT) to accurately characterize and compensate for channel impairments, such as inter-symbol interference (ISI), reflection, and crosstalk. By embedding this intelligent link training directly into the interconnect, TSLink ensures high signal integrity with reduced bit error rates, while minimizing power consumption and eliminating the need for DSPs in the optical module. This protocol-agnostic approach provides flexibility across various high-speed serial protocols, making TSLink an adaptable solution for next-generation AI-centric data centers and high-performance computing environments.

Availability
TeraSignal is now offering TSLink reference designs, complete with TSLink firmware and the TS8401/02 Intelligent Re-Driver, to select partners and customers. Broader TSLink reference design availability is expected later this year.

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