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Silvaco Acquires Memory Compiler Technology of Dolphin Design SAS

Acquisition Expands Company’s Design IP Portfolio to Provide Embedded Memories for SoC Applications

Silvaco, a leading supplier of EDA software and design IP, announced that it has completed the acquisition of the memory compiler technology and standard cell libraries of Dolphin Design SAS. Dolphin Design has been a leading provider of ultra-low power, high-density memory compilers to the SoC design community for over 25 years. The acquisition expands Silvaco’s design IP portfolio to address the growing need for ultra-low power, high-density embedded memories in SoCs for IoT, AI/ML, 5G, and high-performance computing applications.

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Dolphin Design’s memory compiler technologies include high-quality ROM, SRAM, and Register File compilers. The compilers are optimized for high density and low power while providing great degree of flexibility and fine granularity, enabling SoC designers to find the optimal trade-off between performance, power, and area. Dolphin Design’s memory compilers are extensively silicon-proven and designed to provide high yield in manufacturing.

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“Dolphin Design is serving the IP needs of the SoC design community for the past 25 years. Our ultra-low power, high-density compiled memories have been proven in thousands of applications across many foundries,” said Philippe Berger, Dolphin Design CEO. “The transfer of our proven technology to Silvaco will ensure that it continues to be developed and meet the ongoing needs of the semiconductor design community and, at the same time, will reinforce Dolphin Design capabilities to bring state-of-the-art Energy-Efficient Power Management, Audio and Processing IP platforms to the market.”

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“With the addition of Dolphin Design’s proven memory compilers, we are now able to provide a complete suite of design IP to our customers,” said Babak Taheri, Silvaco CEO. “This acquisition demonstrates our ongoing commitment to meet the needs of our customers in designing advanced SoCs. It expands our market opportunity to grow our business and provide higher value products and solutions to the marketplace.”

“SoC designers are looking to minimize power consumption and ultra-low power SRAM, ROM, and Register Files are an essential component,” said Jeff Elias, VP, and GM of the IP division at Silvaco. “With the addition of these compiler technologies to our suite of design IP and IOs, we can meet the needs of designers targeting IoT, AI/ML, 5G, and high-performance computing applications.”

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