Teledyne SP Devices Announces 12-bit Digitizer with 7 Gbyte/s Sustained Data Transfer Rate

By AIT News Desk On Feb 10, 2021

Flexible platform for acquisition and custom digital signal processing

Teledyne SP Devices, a business unit of Teledyne Technologies Incorporated, announced the release of ADQ32 – a fourth-generation modular data acquisition board optimized for high-throughput applications. The combination of on-board open field-programmable gate array (FPGA) and high-speed data streaming makes it ideal even for the most computationally demanding applications.

The dual-channel 12-bit digitizer supports synchronous sampling at 2.5 gigasamples per second (GS/s) on each channel and features an open Xilinx Kintex Ultrascale KU040 field-programmable gate array (FPGA). ADQ32 is streamlined for high-volume applications and is therefore suitable for integration by original equipment manufacturers (OEMs) in areas such as swept-source optical coherence tomography (SS-OCT), time-of-flight mass spectrometry (ToF MS), and distributed optical fiber sensing (DOFS).

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Custom application-specific digital signal processing (DSP) can be performed in real-time in the on-board FPGA to characterize signals and extract valuable information. It can also be used to perform data reduction so that the output rate matches the 7 Gbyte/s sustained transfer capacity of the PCI Express interface. The data can then be post-processed either on the central processing unit (CPU) of the host PC, or transferred via peer-to-peer to a graphics processing unit (GPU).

This architecture offers great flexibility and allows the designer to use the most suitable type of processing resource for a given task. Examples of application-specific DSP include fast-Fourier transform (FFT) and k-space remapping for SS-OCT, and waveform averaging and zero suppression for ToF MS.

In addition to the high streaming rate and computational flexibility, the ADQ32 also offers excellent analog performance in terms of the effective number of bits (ENOB), spurious-free dynamic range (SFDR), and more. Hardware trigger, selection of internal/external clock, and general-purpose input/output (GPIO) simplify system-level integration. Please refer to the datasheet for full specifications.