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Telink and Andes Announce the TLSR9 SoC with RISC-V Processor

Telink Semiconductor and Andes Technology have collaborated on a cutting-edge system on a chip for high-performance IoT applications

Telink Semiconductor and Andes Technology are proud to introduce the new connectivity system on a chip (SoC) for Telink’s latest product line, the TLSR9 series. Powered by the 32-bit AndesCore D25F, the TLSR9 series is designed for the next generation of hearables, wearables, and other high-performance IoT applications. Thanks to the companies’ partnership with IAR Systems, IoT designers will also have access to IAR’s Embedded Workbench (EW), a powerful development toolchain that supports flexible product development.

Enabling Innovative New IoT Products

The Telink TLSR9 series is the latest addition to Telink’s line of complete connectivity solutions, and it is designed to maximize device performance and minimize time to market. The TLSR9 series is designed using the AndeStar™ V5 Instruction Set Architecture (ISA), which complies with the latest RISC-V technology. As an open source instruction set architecture, RISC-V offers developers a great depth of design knowledge and facilitates more innovative and secure processor design.

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The TLSR9 SoC features the D25F RISC-V processor, and is the world’s first SoC that adopts a RISC-V DSP/SIMD P-extension, which is ideal for a variety of mainstream audio, wearables, and IoT development needs. The D25F has an efficient five-stage pipeline and delivers class-leading 2.59 DMIPS/MHz and 3.54 CoreMark/MHz performance. By supporting the RISC-V P-extension (RVP), the D25F significantly increases efficiency for small-volume data computation and makes compact AI/ML applications possible on edge devices. Tests have shown that the D25F can increase the speed at which CIFAR-10 AI models (a common type of image classification model) are run by a factor of 14.3 and increase the speed of keyword-spotting technologies by a factor of 8.9. The standard JTAG and Andes two-wire serial debugging port also helps reduce pin cost.

“We are excited to announce the news,” says Telink Semiconductor CEO Dr. Wenjun Sheng. “Telink has always been dedicated to building the future of the Internet of Things and consumer electronics. That means continuously exploring new ways to make chips that are at once more powerful and easier to put into action. By partnering with Andes Technology and IAR Systems to provide a top-notch processor and integrated development environment for our new TLSR9 product line, we are reducing the difficulty of application development and improving efficiency. Telink will continue to provide quick-to-market, performance-enhanced, cost-efficient solutions to our customers.”

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“We believe the RVP is going to open a new era for data computation on MCUs,” says Andes Technology President Frankwell Lin. “We are grateful to collaborate with Telink and IAR to build the foundation of the RVP ecosystem for edge Artificial Intelligence of Things (AIoT) use cases. With Telink’s TLSR9 and IAR’s EW, developers can easily realize all the advantages of RVP. Andes contributed the first version of the RVP specification to RISC-V last year, and it is now at version 0.8. We are looking forward to the ratification of the RVP standard, which will open up more and more AIoT markets for RISC-V.”

“We are happy to partner with Andes and Telink to deliver innovative new solutions for IoT developers,” says IAR Systems APAC Director Kiyofumi Uemura. “Together, we have a lot to offer with regards to performance, and by providing maximized code speed and minimized code size for the TLSR9 series, we will create new possibilities to reduce time to market and ensure high-quality applications.”

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