Vidatronic achieved a 3X reduction in memory consumption on its analog IP designs for mobile, 5G, hyperscale and other consumer electronics
Cadence Design Systems, announced that Vidatronic, has successfully used the Cadence Spectre X Simulator to achieve leading electromigration and IR drop (EM-IR) reliability analysis on leading-edge 7nm and 5nm analog IP designs for mobile, hyperscale and other consumer electronics. With the Spectre X Simulator, Vidatronic achieved up to 10X speedup and a 3X reduction in memory consumption versus the previous-generation Spectre simulator.
Vidatronic licenses analog intellectual property (IP) designs, including power management unit (PMU), wireless charger, and LED lighting solutions for integration into customers’ systems on chip (SoCs) in advanced-process nodes from 180nm down to 5nm.
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The Spectre X Simulator enabled the Vidatronic team to test the reliability of their IP within larger blocks, ensuring accurate design measurements. Prior to deploying the Spectre X Simulator, Vidatronic’s design simulation took days, and after, the team was able to complete simulation within hours. The Spectre X simulation flow was straightforward, and there was virtually no learning curve for the designers because the team had previous experience with the legacy Spectre simulator. With one project in particular, the Vidatronic engineering team completed a design simulation with two million nodes, 1.6 million capacitors and 4.04 million resistors in a matter of hours.
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“The Spectre X Simulator helped us reach our overall verification goals of improved simulation performance and capacity,” said John Tabler, Principal Member of Technical Staff at Vidatronic. “Cadence helped us deliver signoff accuracy on our 5nm IP design while drastically improving runtime, reducing verification time from days to hours, enabling us to get to market faster.”
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