Andes Technology Corp. Announces its Contribution to the Intel Pathfinder for RISC-V for Pre-Silicon Development Initiative Launch
Andes Technology Corporation , a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, reveals its contribution to the Intel Pathfinder for RISC-V for Pre-Silicon Development initiative launch. Today, Andes announces its highly demanded 64-bit superscalar multicore AX45MP processor IP and 64-bit vector processor core NX27V with up to 512-bit vector length, both pre-integrated with AXI-based AE350 platform, have been available in the Intel Stratix 10 GX FPGA Development Kit.
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“Those two popular RISC-V CPU cores on Andes IP offerings address the requirements of many high-end applications,” said Frankwell Lin CEO of Andes Technology Corp. “Examples are datacenter AI accelerators, storage for enterprise, 5G networks, and AR/VR. By having those two cores available in the Intel® Stratix® 10 GX FPGA Development Kit, SoC design teams can boot Linux OS or upload their critical compute kernels to the FPGA board to quickly explore the benefits of AX45MP and NX27V before first silicon. We are extremely proud of Andes’ contribution to the Intel Incubation & Disruptive Innovation (IDI) Group’s initiative to streamline development flow to leverage Intel Foundry Services state-of-the-art fabs.”
“With partners including Andes Technology Corp. having their IP available on the Intel Stratix 10 GX FPGA product line, SoC designers can easily run interesting software code for evaluating different RISC-V processors,” said (Intel Spokesperson), Intel Corp. (Title). “Thus, Intel is streamlining the ecosystem to enable the rapid flow from SoC architectures to working silicon.”
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Seventeen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and the driving force in taking RISC-V mainstream. Andes’ fifth generation AndeStar architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 3 billion since 2021 and continues to rise. In the end of 2021, the cumulative volume of Andes-Embedded™ SoCs has surpassed 10 billion.
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