Alchip Technology Rolls Out High Performance Computing Packaging Capability
Targets High Performance ASIC Demand
Alchip Technologies, Limited, the high-performance computing ASIC leader, rolled out its Chip-on-Wafer-on-Substrate (CoWoS) packaging capability.
CoWoS packaging, developed first by TSMC, is critical to successful deployment of today’s High-Performance Computing (HPC) ASICs. CoWoS is a 2.5D wafer-level multi-chip packaging technology first introduced by TSMC in 2012 that incorporates multiple side-by-side die on a silicon interposer. Individual chips are bonded through micro-bumps on a silicon interposer forming a chip-on-wafer. Packaging is completed by bonding a package substrate. The configuration improves interconnect density and performance.
Today’s CoWoS chiplet sets include high performance system-on-a-chip (SoC) and a high-performance memory (HBM) block. The CoWoS service covers multiple package designs. A new SoC and HBM2E high bandwidth memory configuration in a 65mmX65mm footprint joins an earlier SoC and HBM2E 55mmX55mm footprint. Alchip supports all TSMC 2.5D packaging solutions.
Alchip’s CoWoS design service covers system planning that includes architecture planning, power supply planning, package ball assignments, interposer die placement, SoC floor planning and IP/IO placement collaboration. It also includes full-service interposer physical design, substrate design, design-for-test (DFT) logic insertion, logic verification among interposer, SoC, and package, and CoWoS/package mechanical and warpage simulation.
According to Alchip Technologies’ President and CEO, Johnny Shen, “Packaging is the new ‘Moore’s Law’ for powerful high-performance computing challenges. Understanding and applying the technology is critical to meeting the demand for more functionality and greater performance in a smaller physical footprint. Our leading edge CoWoS service platform is scoped to cover from system planning, interposer design, test, qualification and to production.”
CoWoS is ideal for Hyperscalers, OEM’s and fabless IC device companies who require product-specific, high performance IC’s.