XConn Technologies to Demo End-to-End PCIe Gen 6 at FMS25
Live demonstration to showcase PCIe Gen 6.2 and CXL 3.1 innovation at Future of Memory and Storage Summit, August 5-7.
XConn Technologies, the innovation leader in next-generation interconnect technology for high-performance computing and AI workloads, announced that it will deliver a live, end-to-end PCIe® Gen 6.2 and CXL® 3.1 technology demonstration at the Future of Memory and Storage (FMS25) event, taking place August 5–7 at the Santa Clara Convention Center in booth #1245.
The demonstration will highlight how XConn’s advanced switching solutions can enable next-generation systems with ultra-high bandwidth, extremely low latency, and seamless support for emerging memory and accelerator architectures. Attendees will see first-hand how Peripheral Component Interconnect Express® (PCIe) Gen 6.2 and Compute Express Link® (CXL) 3.1 technologies are driving the future of composable infrastructure and disaggregated computing.
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“XConn is excited to bring to market PCIe Gen 6.2 and CXL 3.1 switches, with samples now available,” said Gerry Fan, CEO of XConn Technologies. “As the industry accelerates toward more memory-centric and performance-intensive architectures, our commitment is to empower customers with best-in-class, standards-compliant interconnect solutions that scale with tomorrow’s AI and data center workloads.”
“As the industry accelerates toward more memory-centric and performance-intensive architectures, our commitment is to empower customers with best-in-class, standards-compliant interconnect solutions that scale with tomorrow’s AI and data center workloads.”
The PCIe Gen 6.2 and CXL 3.1 demo will be featured in XConn’s booth #1245, at FMS25 and will include a fully integrated, standards-based infrastructure showcasing interoperability and system-level performance. Designed for modern workloads such as AI/ML training, cloud computing, and memory pooling, XConn’s latest switch silicon delivers critical advancements in bandwidth, latency, and power efficiency.
Additionally, XConn is working collaboratively with Intel to enable industry leading features and performance, including XConn’s Apollo 2 PCIe Gen 6.2 and CXL 3.1 switches. In the future, when coupled with Intel processors and validation expertise, XConn anticipates an even stronger ecosystem for both PCIe and CXL by offering customers a proven interoperable solution.
“This innovative collaboration between Intel and XConn will validate all aspects of PCIe and CXL-based systems,” said Ronak Singhal, Senior Fellow, Intel. “This helps to ensure that, in the near future, both software and hardware components will interact seamlessly, offering customers robust end-to-end solutions that meet design and performance requirements, while also strengthening the overall ecosystem and enabling the next generation of industry leading compute architectures.”
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XConn continues to lead the market with the industry’s first hybrid switch supporting both PCIe Gen 6.2 and CXL 3.1 in a single chip, designed to reduce interconnect complexity while improving scalability and system design flexibility. With early samples now available, XConn is partnering with leading OEMs, hyperscalers, and silicon providers to accelerate adoption and deployment.
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