Chiplet Industry Collaboration Develops New Workstream to Standardize Design Automation and Create a Chiplet Marketplace

zGlue, Ayar Labs, Avera Semi, ASE, Cadence, Netronome, and Sarcina Collaborate on Chiplet Design Exchange (CDX) as Part of OCP ODSA Subproject

OCP Regional Summit – zGlue, a custom-chips-on-demand company, announced the details on the progress of the Chiplet Design Exchange (CDX), a new workstream as part of the Open Compute Project (OCP) Open Domain-Specific Architecture (ODSA) subproject to standardize design automation to help create a chiplet marketplace. Other member companies include Ayar Labs, Avera Semi, ASE, Cadence, Netronome and Sarcina. The group is tasked with standardizing machine-readable chiplet models to enable chiplet catalogs and provide reference flows for the development of chiplet-based modules.

As a first step, the group surveyed the industry to understand the needs and concerns for chiplet information exchange and published those results. The group is now working on a whitepaper with the proposed formats and recommendations to trail-blaze a catalog for available chiplets and further demonstrate the proof-of-concept in a package.

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“Heterogeneous integration of chiplets into integrated circuits is already a growing business. A tremendous opportunity awaits, though, when chiplets become available in an accessible fashion similar to silicon design IP blocks,” said Jawad Nasrullah, CTO of zGlue Inc. “A key enabler for the growth is standardization of machine-readable representation of chiplets from various angles including architecture, design automation, supply chain, as well as software stacks. As a chiplet integration company, we are offering tools to enable an ecosystem of companies to serve various upcoming applications of chiplet-based ICs. Chiplet Design Exchange workstream of ODSA will help iron out design and operation collaboration challenges in building integrated circuits with chiplets from multiple companies.”

The ODSA subproject’s mission is to define an open interface and architecture that enables the mixing and matching of silicon chiplets from different vendors via an open marketplace onto a single System on a Chip (SoC). Since its charter within OCP in March 2019, the ODSA has made critical steps in defining and developing a chiplet-based architecture with the introduction of new interfaces, link layers, a marketplace and exchange, and an early proof-of-concept. In addition to the PoC group, other subgroups include the Physical Layer Interface group and the Business Working group.

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Decades of progress with general-purpose CPUs has slowed while performance requirements of workloads have catapulted, driving significant demand in domain-specific accelerators. Chiplet-based designs that combine multiple die into a single package can reduce the development time and manufacturing costs for accelerators. “The integration of multifunctional, mixed technology, IC and chiplet devices into complete SiP or Virtual SoC solutions has become a significant driving force for the semiconductor industry, enabling it to maintain continued performance scaling in the post-Moore era,” commented Eelco Bergman, Senior Director, Business Development, ASE Group. He added, “ASE offers a full range of advanced packaging technologies enabling such heterogeneous products, and therefore firmly supports ODSA and its CDX subgroup in the development of the standards, design tools and supply chain critical for mainstream adoption of these next generation integrated solutions.”

“Created through the ODSA, the Chiplet Design Exchange (CDX) is the next integral piece for the chiplet ecosystem,” said Bapi Vinnakota, Open Domain-Specific Architecture (ODSA) subproject lead for Open Compute Project (OCP). “The CDX will provide a framework and standardization that is needed to create a chiplet marketplace that will significantly reduce chiplet-based product development and manufacturing costs while speeding time to innovation.”

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