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Synopsys Advances Silicon Lifecycle Management to Accelerate Data Transport and Significantly Reduce Test Time

Enabling real-time analytics for silicon health monitoring of increasingly large, complex designs, Synopsys, Inc. announced an innovative streaming fabric technology that shortens both silicon data access and test time by up to 80% while also minimizing excessive power. Generated by Synopsys TestMAX DFT design-for-test tool and part of Synopsys’ cohesive silicon lifecycle management flow, the new streaming fabric is a unique on-chip network that quickly transports silicon data to and from multiple design blocks and multi-die systems, significantly reducing the time to efficiently test and analyze the overall health of the chip for anomalies and failures.

“Enfabrica is building leading-edge silicon at the heart of hyper-distributed compute systems, and we require state-of-the-art silicon lifecycle management technologies to meet our quality goals,” said Rochan Sankar, CEO at Enfabrica. “Synopsys’ new streaming fabric technology has demonstrated substantially reduced test time on our designs versus existing approaches. We’re very pleased with the results and are counting on these gains in our silicon testing.”

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Lowering Test Costs Through Reduced Data Transport Time

Ensuring silicon health and uptime requires constant access and analysis of chip or multi-die system data on parameters such as process, voltage and temperature. For large, advanced-node designs, engineering teams typically use a divide-and-conquer approach by incorporating data access into each design block, and then connecting the blocks to the chip-level pins. Traditional networks are rather rigid, requiring a significant amount of planning. By contrast, the new streaming fabric technology takes a plug-and-play approach, calling for minimal planning effort since it can be programmed to accommodate various block speeds and data interface sizes. To minimize the routing, the fabric supports simplified branching for blocks with small data interfaces. These capabilities ensure block-level data access methodologies are physical design-friendly, require minimal effort and provide the shortest amount of required access time, lowering test costs. Furthermore, the technology’s simplified branching connections minimize the physical impact on designs, enabling engineering teams to quickly deploy the streaming fabric using the Synopsys Digital Design Family.

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Enhancing Data Reliability Via Accurate Power Estimation

Data, including test programs, applied to chips or multi-die systems in the field must not cause the silicon to utilize too much power, which could either damage the part or invalidate results. New power estimation technology incorporated in Synopsys TestMAX ATPG pattern generation solution more accurately determines power drawn at data application time versus prior methods by assigning results from Synopsys PrimePower RTL-to-signoff power analysis technology. As a result, power drop is mitigated, avoiding incorrect silicon data results and damage.

“Efficient, cost-effective silicon data access is a fundamental requirement to achieving reliable device operation during their lifecycles, which is essential for high uptime of mission-critical applications,” said Amit Sanghani, senior vice president of the Synopsys Hardware Analytics and Test team. “Our new streaming fabric and more accurate power-estimation capabilities further strengthen our Silicon Lifecycle Management family of products, ensuring customers can meet these goals while achieving design and schedule targets.”

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[To share your insights with us, please write to sghosh@martechseries.com]

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