Arasan announces its Total MIPI Soundwire IP Solution with the Launch of its Soundwire PHY IP

Arasan Chip Systems, a leading provider of semiconductor IP for the IoT, mobile and automobile SoC’s announces the immediate availability of its MIPI Soundwire PHY I/O IP. With this IP, Arasan now provides a Total IP solution for MIPI Soundwire in compliance with the latest Soundwire Specifications v1.2

Recommended AI News: LumApps Launches LumApps Play, Making Enterprise Video Management Easier, Smarter, and More Secure

MIPI SoundWire protocol is a simple, unified audio interface that has evolved to numerous markets, especially mobile applications  to replace several high pin-count connections, allowing for scalability and flexibility, improved power consumption, and decreased latency. MIPI SoundWire is ideal for a wide range of devices such as personal computers, high-end cellphones, headphones, and hearing aids, ranging from low-cost, low-bandwidth peripherals to high-performance audio codec.

Recommended AI News: HawkEye 360 Reaches Contractual Milestone for Delivering Space-based Radio Frequency Mapping

Arasan’s Soundwire Phy v1.2 comprises PHY Host IP with 1 clock lane, 1 data lane and PHY Device IP with 1 clock lane, 3 data lanes. It seamlessly integrates with Arasan’s Soundwire Host and Device Controller. Arasan’s Soundwire PHY features a programmable delay for high-Z to driving data timing and for accommodation of time to enable Data output signal edge on Clock input, capability for both synchronous and self-timed turn off data output, one-shot with programmable pulse width for self-timed turn off data output. It supports 1.8V +/-10% supply for IOs and 0.8V +/-10% supply for core.

Recommended AI News: Acclarent Launches First ENT Navigation Technology Powered by Artificial Intelligence

[To share your insights with us, please write to sghosh@martechseries.com]