Global Unichip Corporation and Flex Logix Achieve First-Time Working Silicon on Joint ASIC Development Using EFLX Embedded FPGA (eFPGA) IP
Another successful tape-out signals the maturity of eFPGA for ASICs requiring RTL reconfigurability
Flex Logix Technologies, supplier of the fastest and most-efficient AI edge inference accelerator and the leading supplier of eFPGA IP, and Global Unichip Corporation (GUC), the advanced ASIC leader, announced that they have successfully taped out with first-time working silicon using the EFLX eFPGA IP. SoC designers can have high confidence in using EFLX eFPGA and GUC to meet their chip eFPGA requirements.
Portable and Scalable eFPGA to Meet Customer Requirements
eFPGA functionality is becoming more common in ASIC RFQs as system and semiconductor companies seek longer lifetimes out of their chip investments by being able to reprogram hardwired accelerators as algorithms and protocols change. Flex Logix’s EFLX eFPGA is available in popular 40, 22, 28, 16, and 12 nm process nodes and supports 1K – >300K LUT4 equivalents, which enables design services companies to meet their customer’s eFPGA needs.
“We were delighted to work with GUC who provided ASIC services and integrated our EFLX eFPGA in InferX X1,” said Geoff Tate, CEO of Flex Logix. “EFLX IP was architected to be extremely easy to integrate and program for any eFPGA size requirement. This is another example of an ASIC design company achieving first time working silicon using EFLX IP for the first time.”
“We are glad to have the opportunity to work with Flex Logix and integrate their eFPGA IP in InferX X1,” said Ken Chen, President of Global Unichip. “To accommodate the expected increase in ASIC demand, GUC is providing industry-leading design service together with advanced package design capabilities for TSMC’s various process technologies. With proven design expertise and a track record of manufacturing excellence, GUC will enable customers to deliver differentiated and competitive high-performance, power-efficient ASIC products. Our deep hands-on expertise in chip design and manufacturing excellence ensure the first-time silicon success. We look forward to working with Flex Logix for InferX X1 production ramp-up, as well as with our mutual customers to enable future ASICs with RTL reconfigurability.”
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Flex Logix offers two eFPGA cores: the EFLX1K core for small, low-cost applications and the EFLX4K for applications requiring large amounts of reconfigurable logic. The EFLX1K has 1K 4-input-equivalent LUTS and the EFLX4K has 4K 4-input-equivalent-LUTs. Both cores are available in all logic or a combination of logic and DSP multiplier-accumulators for DSP and artificial intelligence (AI) applications. EFLX cores can be tiled together to make larger arrays to support applications needing more LUTs as required, up to 7×7 with any mix of logic and DSP cores.
The EFLX arrays are programmed using VHDL or Verilog. The EFLX Compiler takes the output of a synthesis tool such as Synopsys Synplify and does packing, placement, routing, timing, and bitstream generation. The bitstream, when loaded into the array, programs it to execute the desired RTL.